A Self-Reconfigurable Platform for Built-In Self-Test Applications

This paper introduces a novel architecture that is targeted for digital core testing and built-in-self test (BIST) algorithm development. This reconfigurable architecture is validated by an application that implements the novel idea of verifying algorithms for testing digital circuits by using runtime reconfigurable techniques in order to minimize the circuit area, as well as the test generation and application time. The idea revolves around the dynamic partial reconfiguration of circuits under test in order to inject stuck-at faults at different locations of the circuit and uncover both detectable and undetectable faults. Four testing strategies are presented, and two are experimentally compared, namely, the sequential compile-time reconfiguration and runtime reconfiguration strategies.