DocumentCode :
1063347
Title :
Electrical characteristics of a DSA MOS transistor with a fine structure
Author :
Ohkura, Isao ; Tomisawa, Osamu ; Ohmori, Massashi ; Nakano, Takao
Author_Institution :
Mitsubishi Electric Corporation, Itami, Hyogo, Japan
Volume :
26
Issue :
4
fYear :
1979
fDate :
4/1/1979 12:00:00 AM
Firstpage :
430
Lastpage :
435
Abstract :
Fabrication technologies and electrical characteristics of a diffusion self-aligned MOS transistor (DSA MOST) or a double-diffused MOS transistor (DMOST) are discussed in comparison with a conventional short-channel MOS transistor as a fundamental device for a VLSI. The symmetrical DSA MOS LSI with enhancement depletion configurations requires six photolithographic steps and the number of the steps is the same as that of an NMOS LSI with small physical dimensions. The only difference is the step orders of the enhancement channel doping in these devices. The lowering effects of the threshold voltage and the source drain breakdown voltage are smaller in the DSA MOST than in the conventional MOS transistor. The drain current IDof the symmetrical DSA MOS transistor is, respectively, 1.13 (in the nonsaturation region) and 1.33 (in the saturation region) times larger than that of the conventional short-channel NMOS transistor at the effective gate voltage of 3.0 V. The improvement of the short-channel effect, the current voltage characteristics, and the power-delay product are obtained by the scaling of the DSA MOS transistor.
Keywords :
Current-voltage characteristics; Doping; Electric variables; Fabrication; Impurities; Large scale integration; MOS devices; MOSFETs; Paper technology; Threshold voltage;
fLanguage :
English
Journal_Title :
Electron Devices, IEEE Transactions on
Publisher :
ieee
ISSN :
0018-9383
Type :
jour
DOI :
10.1109/T-ED.1979.19445
Filename :
1480023
Link To Document :
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