DocumentCode :
1065208
Title :
Placement for large-scale floating-gate field-programable analog arrays
Author :
Baskaya, Faik ; Reddy, Swetha ; Sung Kyu Lim ; Anderson, David V.
Author_Institution :
Sch. of Electr. Eng., Georgia Inst. of Technol., Atlanta, GA
Volume :
14
Issue :
8
fYear :
2006
Firstpage :
906
Lastpage :
910
Abstract :
Modern advances in reconfigurable analog technologies are allowing field-programmable analog arrays (FPAAs) to dramatically grow in size, flexibility, and usefulness. Our goal in this paper is to develop the first placement algorithm for large-scale floating-gate-based FPAAs with a focus on the minimization of the parasitic effects on interconnects under various device-related constraints. Our FPAA clustering algorithm first groups analog components into a set of clusters so that the total number of routing switches used is minimized and all IO paths are balanced in terms of routing switches used. Our FPAA placement algorithm then maps each cluster to a computational analog block (CAB) of the target FPAA while focusing on routing switch usage and balance again. Experimental results demonstrate the effectiveness of our approach
Keywords :
field programmable analogue arrays; integrated circuit layout; network routing; FPAA clustering algorithm; analog components; computational analog circuit block; large-scale floating-gate field-programmable analog arrays; placement algorithm; reconfigurable analog technologies; routing switches; Analog circuits; CMOS technology; Clustering algorithms; Field programmable analog arrays; Integrated circuit interconnections; Large-scale systems; Nonvolatile memory; Routing; Signal processing algorithms; Switches; Analog circuit; field-programmable analog arrays (FPAAs); placement;
fLanguage :
English
Journal_Title :
Very Large Scale Integration (VLSI) Systems, IEEE Transactions on
Publisher :
ieee
ISSN :
1063-8210
Type :
jour
DOI :
10.1109/TVLSI.2006.878477
Filename :
1664910
Link To Document :
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