• DocumentCode
    1065724
  • Title

    Analysis and Modeling of Energy Consumption in RLC Tree Circuits

  • Author

    Alioto, Massimo ; Palumbo, Gaetano ; Poli, Massimo

  • Author_Institution
    Dipt. di Ing. dell´´Inf., Univ. di Siena, Siena
  • Volume
    17
  • Issue
    2
  • fYear
    2009
  • Firstpage
    278
  • Abstract
    In this paper, the energy consumption of resistance-inductance-capacitance (RLC) trees is analytically modeled. In particular, the results obtained by the same authors for RC tree circuits are generalized, allowing for a deep understanding of the impact of the inductance. The modeling approach proposed relies on the adoption of an equivalent second-order RLC circuit, whose energy consumption is evaluated in a closed form. These results are then extended to RLC circuits with arbitrary order, deriving a simple and accurate model. The energy dependence on the input rise time is also analyzed in detail, identifying the ranges for which the RLC circuit can be approximated to a simple capacitance or an RC circuit. The model equations provide an insight into the dependence of the energy consumption on the circuit parameters. Indeed, the energy is explicitly expressed as a function of the resistances, capacitances and inductances of the original network. The energy model proposed is shown to be accurate enough for modeling purposes through comparison with SPICE simulations, as the error is typically in the order of a few percentage points.
  • Keywords
    RLC circuits; VLSI; integrated circuit design; integrated circuit interconnections; low-power electronics; RLC tree circuit energy consumption; SPICE simulation comparison; VLSI; circuit parameters; equivalent second-order RLC circuit; integrated circuit interconnections; resistance-inductance-capacitance circuit modeling; Delay; Driver circuits; Energy consumption; Equations; Inductance; Integrated circuit interconnections; Parasitic capacitance; RLC circuits; SPICE; Semiconductor device modeling; Energy consumption model; VLSI; inductance; interconnects; power consumption; resistance–inductance–capacitance (RLC) tree circuits;
  • fLanguage
    English
  • Journal_Title
    Very Large Scale Integration (VLSI) Systems, IEEE Transactions on
  • Publisher
    ieee
  • ISSN
    1063-8210
  • Type

    jour

  • DOI
    10.1109/TVLSI.2008.2004546
  • Filename
    4749363