DocumentCode
1067510
Title
An efficient methodology for building macromodels of IC fabrication processes
Author
Low, K.K. ; Director, Stephen W.
Author_Institution
Dept. of Electr. & Comput. Eng., Carnegie Mellon Univ., Pittsburgh, PA, USA
Volume
8
Issue
12
fYear
1989
fDate
12/1/1989 12:00:00 AM
Firstpage
1299
Lastpage
1313
Abstract
An efficient macromodeling approach for statistical IC process design based on experimental design and regression analysis is described. Automatic selection of the input variables is done as part of the model-building procedure to reduce the problem dimension to a manageable size. The resulting macromodels are simple analytical expressions describing the device characteristics in terms of the fundamental process variables. The validity and efficiency of the macromodels obtained by the approach are illustrated through their use in an IC process design centering example. Although the approach has only been applied to the IC fabrication process level, the underlying methodology can also be used to obtain circuit-level macromodels
Keywords
integrated circuit technology; modelling; statistical analysis; IC fabrication processes; macromodels; model-building procedure; regression analysis; statistical IC process design; Buildings; Circuits; Computational efficiency; Computational modeling; Costs; Design for experiments; Fabrication; Input variables; Process design; Regression analysis;
fLanguage
English
Journal_Title
Computer-Aided Design of Integrated Circuits and Systems, IEEE Transactions on
Publisher
ieee
ISSN
0278-0070
Type
jour
DOI
10.1109/43.44510
Filename
44510
Link To Document