DocumentCode
1067741
Title
Analogue CMOS continuous-time tapped delay-line circuit
Author
Justh, E.W. ; Kub, Francis J.
Author_Institution
SFA Inc., Rockville, MD
Volume
31
Issue
21
fYear
1995
fDate
10/12/1995 12:00:00 AM
Firstpage
1793
Lastpage
1794
Abstract
A microelectronic 20-stage tapped delay line consisting of cascaded lowpass filter amplifier stages has been demonstrated. The delay per tap is ~2.7 ns, and different versions have been optimised for pulsed and narrowband operation in the 30-70 MHz frequency range. Potential applications are in radar and adaptive antenna systems
Keywords
CMOS analogue integrated circuits; cascade networks; continuous time systems; delay lines; 2.7 ns; 30 to 70 MHz; adaptive antenna systems; analogue CMOS continuous-time tapped delay-line circuit; cascaded lowpass filter amplifiers; microelectronic multistage circuit; narrowband operation; pulsed operation; radar antenna systems;
fLanguage
English
Journal_Title
Electronics Letters
Publisher
iet
ISSN
0013-5194
Type
jour
Filename
475077
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