Title :
Hypercube multiprocessors with bus connections for improving communication performance
Author :
Ishikawa, Tsutomu
Author_Institution :
NTT Commun. Sci. Lab., Kanagawa, Japan
fDate :
11/1/1995 12:00:00 AM
Abstract :
A modified hypercube with multiple buses used as bypass routes is proposed. This is achieved by partitioning all processor elements into subsets using coding theory and by connecting all PEs in each subset to a bus. The basic structure for small systems reduces the diameter to two (one on a bus plus one on a link). In the generalized structure for large systems, it is reduced to less than about one-third that of the regular hypercube
Keywords :
Hamming codes; hypercube networks; network routing; parallel architectures; performance evaluation; Hamming code; bus connections; bypass routes; coding theory; communication performance; hypercube multiprocessors; multiple buses; network diameter; perfect code; routing algorithms; Circuits; Codes; Computer architecture; Hamming distance; Hardware; Hypercubes; Joining processes; Network topology; Routing; System performance;
Journal_Title :
Computers, IEEE Transactions on