A 16-Mb flash EEPROM with a new self-data-refresh scheme for a sector erase operation

Author

Atsumi, Shigeru ; Kuriyama, Masao ; Umezawa, Akira ; Banba, Hironori ; Naruke, Kiyomi ; Yamada, Seiji ; Ohshima, Yoichi ; Oshikiri, Masamitsu ; Hiura, Yohei ; Yamane, Tomoko ; Yoshikawa, Kuniyoshi

Author_Institution

Semicond. Device Eng. Lab., Toshiba Corp., Kawasaki, Japan

Volume

29

Issue

4

fYear

1994

fDate

4/1/1994 12:00:00 AM

Firstpage

461

Lastpage

469

Abstract

A 16-Mb flash EEPROM has been developed based on the 0.6-μm triple-well double-poly-Si single-metal CMOS technology. A compact row decoder circuit for a negative gate biased erase operation has been designed to obtain the sector erase operation. A self-data-refresh scheme has been developed to overcome the drain-disturb problem for unselected sector cells. A self-convergence method after erasure is applied in this device to overcome the overerase problem that causes read operation failure. Both the self-data-refresh operation and the self-convergence method are verified to be involved in the autoerase operation. Internal voltage generators independent of the external voltage supply and temperature has been developed. The cell size is 2.0 μm×1.7 μm, resulting in a die size of 7.7 mm×17.32 mm

Keywords

CMOS integrated circuits; EPROM; decoding; integrated memory circuits; silicon; 0.6 micron; 16 Mbit; Si; autoerase operation; compact row decoder circuit; double-polysilicon process; flash EEPROM; internal voltage generators; negative gate biased erase operation; poly-Si; sector erase operation; self-convergence method; self-data-refresh scheme; single-metal CMOS technology; triple-well process; Circuits; Decoding; EPROM; Flash memory; Laboratories; Semiconductor devices; Semiconductor diodes; Temperature; Threshold voltage; Voltage control;

fLanguage

English

Journal_Title

Solid-State Circuits, IEEE Journal of

Publisher

ieee

ISSN

0018-9200

Type

jour

DOI

10.1109/4.280696

Filename

280696