A 1-µm bipolar VLSI technology

A 1-µm VLSI process technology has been developed for the fabrication of bipolar circuits. The process employs electron-beam slicing writing, plasma processing, ion implantation, and low-temperature oxidation/annealing to fabricate bipolar device structures with a minimum feature size of 0.9 µm. Both nonisolated I²L and isolated Schottky transistor logic (STL) devices and circuits have been fabricated with this process technology. The primary demonstration vehicle is a scaled LSI, I²L, 4-bit processor chip (SBP0400) with a minimum feature size of 1 µm. Scaled SPB0400´s have been fabricated that operate at clock speeds 3 × higher than their full-size counterparts at 50-mA chip current. Average propagation delay has been measured as a function of minimum feature size for both I²L and STL device designs. Power-delay products of 14 fJ for I²L and 30 fJ for STL have been measured.