• DocumentCode
    1069528
  • Title

    Salphasic distribution of clock signals for synchronous systems

  • Author

    Chi, Vemon L.

  • Author_Institution
    Microelectron. Syst. Lab., North Carolina Univ., Chapel Hill, NC, USA
  • Volume
    43
  • Issue
    5
  • fYear
    1994
  • fDate
    5/1/1994 12:00:00 AM
  • Firstpage
    597
  • Lastpage
    602
  • Abstract
    The design of a synchronous system having a global clock must account for propagation-delay-induced phase shifts experienced by the clock signal (clock skew) in its distribution network. As clock speeds and system diameters increase, this requirement becomes increasingly constraining on system designs. The paper describes a method that exploits properties of standing waves to reduce substantially clock skews due to unequal path lengths, for distribution network diameters up to several meters. The basic principles are developed for a loaded transmission line, and then applied to an arbitrary branching tree of such lines to implement a clock distribution network. The extension of this method to two- and three-dimensional distribution media is also presented, suggesting the feasibility of implementing printed circuit board clock planes exhibiting negligible phase shift over their extents
  • Keywords
    clocks; synchronisation; transmission line theory; clock plane; clock signal; clock signals; clock skews; distribution network; loaded transmission line; phase shifts; phase skew; printed circuit board clock planes; propagation delay; salphasic clock; synchronous system; synchronous systems; system clock; Clocks; Conductors; Distributed parameter circuits; Geometry; Integrated circuit interconnections; Propagation delay; Propagation losses; Resonance; Signal design; Transmission line theory;
  • fLanguage
    English
  • Journal_Title
    Computers, IEEE Transactions on
  • Publisher
    ieee
  • ISSN
    0018-9340
  • Type

    jour

  • DOI
    10.1109/12.280806
  • Filename
    280806