• DocumentCode
    1069638
  • Title

    A New Fabrication and Assembly Process for Ultrathin Chips

  • Author

    Burghartz, Joachim N. ; Appel, Wolfgang ; Rempp, Horst D. ; Zimmermann, Martin

  • Author_Institution
    Inst. for Microelectron. Stuttgart (IMS CHIPS), Stuttgart
  • Volume
    56
  • Issue
    2
  • fYear
    2009
  • Firstpage
    321
  • Lastpage
    327
  • Abstract
    A new ultrathin chip fabrication and assembly process, consisting of a preprocess module Chipfilm and a postprocess module Pick, Crack, and Place, is presented. In contrast to the established wafer thinning technique, the preprocessed wafer substrates are prepared with extremely narrow buried cavities beneath the chip areas at a well-defined distance from the wafer surface, thus precisely defining the chip thickness a priori. After CMOS integration on those dedicated wafer substrates, chips are detached from the wafer surface by etching trenches at the chip edges into the buried cavities and breaking of residual anchors by mechanical force in the postprocess. The feasibility of the new process is demonstrated through a mixed-signal circuit having 38 000 digital and 2700 analog transistors, showing full functionality within specifications for 20-mum-thin chips even under a bending stress of up to 110 MPa.
  • Keywords
    CMOS analogue integrated circuits; CMOS digital integrated circuits; integrated circuit manufacture; microassembling; mixed analogue-digital integrated circuits; semiconductor industry; CMOS integration; Chipfllm; analog transistors; assembly; bending stress; buried cavities; digital transistors; fabrication; mechanical force; mixed-signal circuit; post-process module; preprocess module; residual anchor breaking; ultrathin chip; wafer thinning; Assembly; CMOS integrated circuits; CMOS technology; Etching; Fabrication; Integrated circuit technology; Microelectronics; Silicon; Substrates; Three-dimensional integrated circuits; CMOS FETs; CMOS integrated circuits (ICs); Cavities; IC fabrication; conductivity; electric field effects; electrochemical processes; electronics; electrostatic processes; etching; flexible structures; manipulators; microassembly; micromachining; semiconductor device doping; semiconductor device manufacture; semiconductor epitaxial layers; separation; silicon; stress; technology;
  • fLanguage
    English
  • Journal_Title
    Electron Devices, IEEE Transactions on
  • Publisher
    ieee
  • ISSN
    0018-9383
  • Type

    jour

  • DOI
    10.1109/TED.2009.2010581
  • Filename
    4752724