Title :
A 5-V only 16-kbit stacked-capacitor MOS RAM
Author :
Koyanagi, Mitsumasa ; Sakai, Yoshio ; Ishihara, Masamichi ; Tazunoki, Masanori ; Hashimoto, Norikazu
Author_Institution :
Hitachi Ltd., Tokyo, Japan
fDate :
8/1/1980 12:00:00 AM
Abstract :
A novel one-transistor-type MOS RAM is discussed. This memory cell gives a remarkable area reduction and/or increase in storage capacitance by stacking the main portion of the storage capacitor on the address transistor, bit lines, or field oxides. It is called a stacked-capacitor (STC) RAM. This STC memory has a three-level poly-Si structure. The stacked capacitor has poly-Si-Si3N4-poly-Si (or Al) structure. A 16-kbit STC RAM has been fabricated with 3-µm technology and operated successfully. Memory performance is strikingly improved by using STC cells.
Keywords :
Artificial intelligence; Capacitance; Circuits; Lithography; MOS capacitors; MOSFETs; Random access memory; Read-write memory; Stacking; Voltage;
Journal_Title :
Electron Devices, IEEE Transactions on
DOI :
10.1109/T-ED.1980.20076
