DocumentCode
1070651
Title
Efficient Bit-Parallel GF(2^m) Multiplier for a Large Class of Irreducible Pentanomials
Author
Cilardo, Alessandro
Author_Institution
Dept. of Comput. Sci., Univ. of Naples, Naples
Volume
58
Issue
7
fYear
2009
fDate
7/1/2009 12:00:00 AM
Firstpage
1001
Lastpage
1008
Abstract
This work studies efficient bit-parallel multiplication in GF(2m) for irreducible pentanomials, based on the so-called shifted polynomial bases (SPBs). We derive a closed expression of the reduced SPB product for a class of polynomials xm + xk s + xk s-1+ hellip + xk-1 + 1, with ks - k1 les m+1/ 2. Then, we apply the above formulation to the case of pentanomials. The resulting multiplier outperforms, or is as efficient as the best proposals in the technical literature, but it is suitable for a much larger class of pentanomials than those studied so far. Unlike previous works, this property enables the choice of pentanomials optimizing different field operations (for example, inversion), yet preserving an optimal implementation of field multiplication, as discussed and quantitatively proved in the last part of the paper.
Keywords
digital arithmetic; multiplying circuits; SPB product; bit-parallel GF multiplier; bit-parallel multiplication; irreducible pentanomials; shifted polynomial bases; Arithmetic; Computer science; Delay effects; Elliptic curve cryptography; Galois fields; Hardware; Polynomials; Proposals; Software algorithms; GF(2^m) bit-parallel multiplication; irreducible pentanomials.; shifted polynomial bases;
fLanguage
English
Journal_Title
Computers, IEEE Transactions on
Publisher
ieee
ISSN
0018-9340
Type
jour
DOI
10.1109/TC.2009.16
Filename
4752811
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