ERSFQ 4-to-16 Decoder for Energy-Efficient RAM

Author

Kirichenko, A.F. ; Vernik, I.V. ; Mukhanov, O.A. ; Ohki, T.A.

Author_Institution

HYPRES, Elmsford, NY, USA

Volume

25

Issue

3

fYear

2015

fDate

Jun-15

Firstpage

1

Lastpage

4

Abstract

We designed, fabricated, and demonstrated an energy-efficient ERSFQ 4-bit decoder. The first version of the decoder is designed and fabricated using HYPRES legacy 1.0-μm four-layer 4.5-kA/cm² process. It occupies an area of 700 μm × 1800 μm, which is to be reduced to 160 μm × 400 μm once fabricated using HYPRES´s RIPPLE-2 0.25-μm six-layer process. The decoder features ±13% dc bias current operating margins and below 70-aJ energy consumption per one address select operation. We report test results of the decoder and discuss its future implementation in cryogenic random access memory devices, including magnetic memory devices.

Keywords

decoding; magnetic storage; random-access storage; HYPRES legacy; HYPRES reduced six-layer process; cryogenic random access memory devices; dc bias current; energy consumption; energy-efficient ERSFQ 4-bit decoder; energy-efficient RAM; magnetic memory devices; size 1.0 mum to 0.25 mum; word length 4 bit; Arrays; Art; Cryogenics; Decoding; Energy efficiency; Random access memory; Superconducting magnets; Cryogenic magnetic memory; RSFQ; SFQ; cryogenic magnetic memory; energy-efficient logic; random access memory;

fLanguage

English

Journal_Title

Applied Superconductivity, IEEE Transactions on

Publisher

ieee

ISSN

1051-8223

Type

jour

DOI

10.1109/TASC.2014.2385479

Filename

6995942