A VME 32 channel pipeline TDC module with TMC LSIs

Author

Shirasu, Hideki ; Arai, Yutaro ; Ikeno, M. ; Murata, Toshimitsu ; Emura, Tsuneo

Author_Institution

Tokyo Univ. of Agric. & Technol., Japan

Volume

43

Issue

3

fYear

1996

fDate

6/1/1996 12:00:00 AM

Firstpage

1799

Lastpage

1803

Abstract

A new 32-channel pipeline TDC module, which implements custom-developed time memory cell LSIs, has been developed for high-rate wire-chamber applications. The module has achieved a 370 ps time resolution, and records data for a period of 3.2 μsec. To handle the large data size, a digital signal processor (DSP56002) is implemented in the module. Most of the control logic is implemented in two complex PLDs to achieve a density of 32 channels in a single-width; double-height VME module

Keywords

analogue-digital conversion; detector circuits; digital signal processing chips; high energy physics instrumentation computing; large scale integration; multiwire proportional chambers; nuclear electronics; pipeline processing; proportional counters; DSP56002; VME 32 channel pipeline TDC module; control logic; custom-developed time memory cell LSI; digital signal processor; high-rate wire-chamber applications; single-width double-height VME module; time resolution; CMOS technology; Clocks; Costs; Digital signal processing chips; Digital signal processors; Frequency; Large scale integration; Pipelines; Signal resolution; Timing;

fLanguage

English

Journal_Title

Nuclear Science, IEEE Transactions on

Publisher

ieee

ISSN

0018-9499

Type

jour

DOI

10.1109/23.507225

Filename

507225