Title :
Spur-Suppression Techniques for Frequency Synthesizers
Author :
Liang, Che-Fu ; Chen, Hsin-Hua ; Liu, Shen-Iuan
Author_Institution :
Nat. Taiwan Univ., Taipei
Abstract :
A frequency synthesizer with two spur-suppression circuits has been fabricated in 0.18 mum CMOS technology. The chip area is 1.3 mm times 1.3 mm. The frequency synthesizer consumes 18.9 mW from a 1.8-V supply. Compared with the conventional frequency synthesizer without the spur-suppression circuit, the measured reference spur at 8 MHz is reduced by 18 dBc for the first spur-suppression circuit and 31 dBc for the second one. The measured switching time from 1792 to 1824 MHz is 27.89 mus within 20 ppm of the target frequency.
Keywords :
CMOS analogue integrated circuits; frequency synthesizers; phase locked loops; CMOS technology; charge pump; frequency 8 MHz; frequency synthesizers; power 18.9 mW; size 0.18 micron; spur-suppression circuits; spur-suppression techniques; voltage 1.8 V; CMOS technology; Circuits; Clocks; Frequency measurement; Frequency synthesizers; Phase frequency detector; Phase locked loops; Timing; Voltage control; Voltage-controlled oscillators; Charge pump (CP); frequency synthesizer; integer-$N$; spur suppression;
Journal_Title :
Circuits and Systems II: Express Briefs, IEEE Transactions on
DOI :
10.1109/TCSII.2007.896938
