Title :
Transient-Induced Latchup Dependence on Power-Pin Damping Frequency and Damping Factor in CMOS Integrated Circuits
Author :
Hsu, Sheng-Fu ; Ker, Ming-Dou
Author_Institution :
Nat. Chiao-Tung Univ., Hsinchu
Abstract :
The bipolar (underdamped sinusoidal) transient noise on power pins of CMOS integrated circuits (ICs) can trigger latchup in CMOS ICs under system-level electrostatic-discharge test. Two dominant parameters of bipolar transient noise-damping frequency and damping factor-strongly depend on system shielding, board-level noise filter, chip-/board-level layout, etc. The transient-induced-latchup (TLU) dependence on power-pin damping frequency and damping factor was characterized by device simulation and verified by experimental measurement. From the simulation results, bipolar-trigger waveforms with damping frequencies of several tens of megahertz can trigger the TLU most easily. However, TLU is less sensitive to the bipolar-trigger waveforms with an excessively large damping factor or an excessively low/high damping frequency. The simulation results have been experimentally verified with the silicon-controlled-rectifier (SCR) test structures that are fabricated in a 0.25-mum CMOS technology.
Keywords :
CMOS integrated circuits; damping; electrostatic discharge; filters; integrated circuit testing; transient response; CMOS integrated circuits; bipolar transient noise; board-level noise filter; damping factor; power-pin damping frequency; silicon-controlled rectifier; system-level electrostatic-discharge test; transient-induced latchup dependence; CMOS integrated circuits; CMOS technology; Circuit testing; Damping; Filters; Frequency; Integrated circuit noise; Integrated circuit testing; Pins; System testing; Bipolar-trigger voltage; latchup; silicon-controlled rectifier (SCR); system-level electrostatic-discharge (ESD) test; transient-induced latchup (TLU);
Journal_Title :
Electron Devices, IEEE Transactions on
DOI :
10.1109/TED.2007.901391
