DocumentCode
1073389
Title
A high-speed monolithic InP MISFET integrated logic inverter
Author
Messick, Louis J.
Author_Institution
Naval Ocean Systems Center, San Diego, CA
Volume
28
Issue
2
fYear
1981
fDate
2/1/1981 12:00:00 AM
Firstpage
218
Lastpage
221
Abstract
High dynamic range monolithic n-channel InP MISFET integrated inverter circuits with delay times of 350 ps have been fabricated on Fe-doped semi-insulating substrates using ion implantation for channel and contact regions and pyrolytic SiO2 for the gate insulation. These circuits, consisting of two active elements, a 4-µm channel-length normally-off enhancement driver MISFET, and a 4-µm gate-length normally-on depletion load MISFET are designed for use in direct-coupled high-speed logic. In comparison to the dominant GaAs MESFET approach, the present circuit does not require level shifting and uses only a single power supply. With
V these inverters exhibit logic swings of 11.2 V, noise margins of 4.5 and 3.2 V, and dc gain in the linear region of 3.1.
V these inverters exhibit logic swings of 11.2 V, noise margins of 4.5 and 3.2 V, and dc gain in the linear region of 3.1.Keywords
Delay; Driver circuits; Dynamic range; Indium phosphide; Insulation; Ion implantation; Logic circuits; Logic design; MISFETs; Pulse inverters;
fLanguage
English
Journal_Title
Electron Devices, IEEE Transactions on
Publisher
ieee
ISSN
0018-9383
Type
jour
DOI
10.1109/T-ED.1981.20315
Filename
1481467
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