Title :
Error analysis of LNS addition/subtraction with direct-computation implementation
Author_Institution :
Dept. of Inf. Eng. & Comput. Sci., Feng Chia Univ., Taichung
fDate :
7/1/2009 12:00:00 AM
Abstract :
Logarithmic number system (LNS) arithmetic is more efficient than floating-point (FLP) arithmetic in some complex function computation. However, computation of the log2 (1plusmn2-v) function in large word-length LNS addition/subtraction will cost a large hardware. Direct computation of the log2 (1plusmn2-v) function is a promising method for the practical implementation of large word-length LNS arithmetic. Two most important operations in this method are the exponent and logarithm computations. The authors analysed the precision requirement in computing the exponential and logarithmic functions for the direct-computation of LNS addition/subtraction. The formulas for the maximum allowable errors of the exponent and logarithm computations within the LNS unit that has better or equal precision performance than that of a comparable IEEE FLP unit has been derived. The simulation results show that these estimation formulas for the two maximum errors are correct and thus can be used in the design of the LNS addition/subtraction unit with direct-computation implementation method.
Keywords :
adders; digital arithmetic; LNS addition; LNS subtraction; complex function computation; direct computation; error analysis; exponent computation; floating-point arithmetic; logarithmic number system arithmetic;
Journal_Title :
Computers & Digital Techniques, IET
DOI :
10.1049/iet-cdt.2008.0098