Title :
High-throughput one-dimensional median and weighted median filters on FPGA
Author :
Fahmy, S.A. ; Cheung, P.Y.K. ; Luk, W.
Author_Institution :
CTVR, Trinity Coll. Dublin, Dublin
fDate :
7/1/2009 12:00:00 AM
Abstract :
Most effort in designing median filters has focused on two-dimensional filters with small window sizes, used for image processing. However, recent work on novel image processing algorithms, such as the trace transform, has highlighted the need for architectures that can compute the median and weighted median of large one-dimensional windows, to which the optimisations in the aforementioned architectures do not apply. A set of architectures for computing both the median and weighted median of large, flexibly sized windows through parallel cumulative histogram construction is presented. The architecture uses embedded memories to control the highly parallel bank of histogram nodes, and can implicitly determine window sizes for median and weighted median calculations. The architecture is shown to perform at 72 Msamples, and has been integrated within a trace transform architecture.
Keywords :
field programmable gate arrays; median filters; transforms; FPGA; embedded memories; high-throughput one-dimensional median filter; histogram nodes; image processing algorithms; parallel cumulative histogram construction; trace transform architecture; weighted median filters;
Journal_Title :
Computers & Digital Techniques, IET
DOI :
10.1049/iet-cdt.2008.0119