Title :
MANA: A Shortest Path Maze Algorithm Under Separation and Minimum Length NAnometer Rules
Author :
Fong-Yuan Chang ; Ren-Song Tsay ; Wai-Kei Mak ; Sheng-Hsiung Chen
Author_Institution :
SYNOPSYS Taiwan Co., Ltd., Hsinchu, Taiwan
Abstract :
Due to process limitations, wiring rules are imposed on chip layout by foundries. Under nanometer wiring rules, the required separation between two wire ends is dependent on their surrounding wires, and there is a limit on the minimum length of each wire segment. However, traditional shortest path algorithms are not properly designed for these rules. In the paper, we propose a maze routing algorithm, called MANA, capable of finding legal shortest paths under these rules. Experiments with seven industrial cases show that by handling these rules during maze routing, 94% of the violations are prevented on average, and the overall runtime of a commercial router is reduced by 71%. In addition, the total wire length is also reduced by 3% on average.
Keywords :
foundries; integrated circuit layout; microprocessor chips; network routing; wires (electric); MANA; chip layout; foundries; legal shortest paths; maze routing; minimum length nanometer rules; nanometer wiring rules; process limitations; separation; shortest path maze algorithm; surrounding wires; wire segment; Algorithm design and analysis; Law; Routing; Runtime; Wires; Wiring; End–end separation; minimum length; nanometer rules; shortest path;
Journal_Title :
Computer-Aided Design of Integrated Circuits and Systems, IEEE Transactions on
DOI :
10.1109/TCAD.2013.2265878