• DocumentCode
    1076249
  • Title

    VIB-1 scaling limitations of P channel devices in a CMOS technology

  • Author

    Scott, David B.

  • Volume
    28
  • Issue
    10
  • fYear
    1981
  • fDate
    10/1/1981 12:00:00 AM
  • Firstpage
    1259
  • Lastpage
    1259
  • Keywords
    CMOS technology; Circuit optimization; Circuit simulation; Electrons; Instruments; Integrated circuit modeling; Laboratories; Power dissipation; Very large scale integration; Voltage;
  • fLanguage
    English
  • Journal_Title
    Electron Devices, IEEE Transactions on
  • Publisher
    ieee
  • ISSN
    0018-9383
  • Type

    jour

  • DOI
    10.1109/T-ED.1981.20590
  • Filename
    1481742