Title :
A sub-nanosec, oxide isolated ISL technology
Author :
Roberts, P.C.T. ; Lamb, D.R. ; Belt, R. ; Bostick, D. ; Pai, S. ; Burbank, D.
Author_Institution :
Honeywell, Systems and Research Center, Minneapolis, Minnesota
fDate :
2/1/1981 12:00:00 AM
Abstract :
An oxide isolated Integrated Schottky Logic (ISL) gate has been designed and fabricated using 1.25 µm minimum goemetries and a 1 µm thick epitaxy layer. Computer simulations and experimental results show good agreement and demonstrate that this gate structure provides a room temperative gate delay of approximately 0.7ns at a current level of 100 µA.
Keywords :
Belts; Clamps; Current measurement; Delay; Epitaxial layers; Isolation technology; Logic; Power supplies; Resistors; Schottky diodes;
Journal_Title :
Electron Device Letters, IEEE
DOI :
10.1109/EDL.1981.25328
