Title :
Gate Sizing by Lagrangian Relaxation Revisited
Author :
Wang, Jia ; Das, Debasish ; Zhou, Hai
Author_Institution :
Northwestern Univ., Evanston, IL, USA
fDate :
7/1/2009 12:00:00 AM
Abstract :
In this paper, we formulate the generalized convex sizing (GCS) problem that unifies the sizing problems and applies to sequential circuits with clock-skew optimization. We revisit the approach to solve the sizing problem by Lagrangian relaxation, point out several misunderstandings in the previous paper, and extend the approach to handle general convex delay functions in the GCS problems. We identify a class of proper GCS problems whose objective functions in the simplified dual problem are differentiable and transform the simultaneous sizing and clock-skew optimization problem into a proper GCS problem. We design an algorithm based on the method of feasible directions and min-cost network flow to solve proper GCS problems. The algorithm will provide evidences for infeasible GCS problems according to a condition derived by us. Experimental results confirm the efficiency and the effectiveness of our algorithm when the Elmore delay model is used.
Keywords :
circuit optimisation; clocks; convex programming; relaxation; sequential circuits; Elmore delay model; Lagrangian relaxation revisited; clock-skew optimization; gate sizing; general convex delay functions; generalized convex sizing; sequential circuits; Convex programming; Lagrangian relaxation; gate sizing; method of feasible directions; network flow;
Journal_Title :
Computer-Aided Design of Integrated Circuits and Systems, IEEE Transactions on
DOI :
10.1109/TCAD.2009.2018872