DocumentCode
1077501
Title
Incremental Improvement of Voltage Assignment
Author
Wu, Huaizhi ; Wong, Martin D F
Author_Institution
Synopsys Inc., Mountain View, CA
Volume
28
Issue
2
fYear
2009
Firstpage
217
Lastpage
230
Abstract
Design for low power has become a key requirement in today´s System-on-a-Chip design, particularly for mobile applications. Multi-Vdd (MSV) is an effective method to reduce both leakage and dynamic powers. In a MSV design, cells of different supply voltages are often grouped into a small number of voltage islands, in order to avoid complex power-supply system and excessive amount of level shifters. In 2005, Wu et al proposed an elegant algorithm for voltage-island grouping based on the physical proximity of the critical cells in a postplacement voltage assignment and, in 2006, proposed an efficient algorithm for voltage assignment which not only meets timing but also forms good proximity of the critical cells. However, due to insufficient slack, a few isolated critical cells (called outliers) may still exist in the resulting voltage assignment, causing disproportionately expensive penalty to the final voltage-island grouping. In this paper, we propose a novel approach to improve the voltage assignment by automatic outlier detection followed by incremental placement. The outlier detection is based on a modified algorithm for the facility-location problem and proper parameter setting. We also propose a novel partial-sort technique which speeds up this algorithm significantly (up to 3times in our experiments). The incremental placement is guided by setting proper constraints on the paths containing the detected outliers, such that the outliers can be eliminated later. Our experiments on industry designs show that our algorithm leads to 12%-54% improvement in the final voltage-island grouping, with quick turn-around time.
Keywords
system-on-chip; automatic outlier detection; dynamic powers; final voltage-island grouping; isolated critical cells; level shifters; mobile applications; system-on-a-chip design; voltage assignment; voltage islands; voltage-island grouping; Low power; outlier; placement; voltage assignment;
fLanguage
English
Journal_Title
Computer-Aided Design of Integrated Circuits and Systems, IEEE Transactions on
Publisher
ieee
ISSN
0278-0070
Type
jour
DOI
10.1109/TCAD.2008.2009155
Filename
4757334
Link To Document