DocumentCode
1077900
Title
A high density CMOS inverter with stacked transistors
Author
Colinge, J.P. ; Demoulin, E.
Author_Institution
Université Catholique de Louvain, Louvain-La-Neuve, Belgium
Volume
2
Issue
10
fYear
1981
fDate
10/1/1981 12:00:00 AM
Firstpage
250
Lastpage
251
Abstract
This paper describes a complete CMOS inverter, whose P-channel transistor is made from laser annealed polycrystalline silicon and is superimposed upon the N-channel transistor. The single gate is common to both transistors. The process is NMOS compatible and polysilicon transistors with channel lengths down to 4 micrometers have been made.
Keywords
Annealing; CMOS process; CMOS technology; Doping; Inverters; MOS devices; Power lasers; Semiconductor lasers; Silicon; Threshold voltage;
fLanguage
English
Journal_Title
Electron Device Letters, IEEE
Publisher
ieee
ISSN
0741-3106
Type
jour
DOI
10.1109/EDL.1981.25421
Filename
1481905
Link To Document