DocumentCode
1078557
Title
Embedded power: a 3-D MCM integration technology for IPEM packaging application
Author
Liang, Zhenxian ; van Wyk, J.D. ; Lee, Fred C.
Author_Institution
Center for Power Electron. Syst., Virginia Polytech. Inst. & State Univ., Blacksburg, VA
Volume
29
Issue
3
fYear
2006
Firstpage
504
Lastpage
512
Abstract
Embedded power (EP) is the name for an integration technology for the power electronics switching stage, in which the multiple bare power chips, such as IGBTs, MOSFETs, and diodes, are buried in a ceramic frame and covered by a dielectric layer with via holes on the Al pads of the chips. Then, a planar metallization pattern is deposited onto it both for bonding to the power chips and a circuit wiring. The ceramic frame can be used as an extra thermal path and substrate for fabrication of the hybrid circuit with compatible thin- or thick-film techniques. When this integrated chips component is stacked with a base substrate and the associated components, a novel three-dimensional (3-D) multichip module (MCM) is produced. Such an integrated power electronics module (IPEM) offers performance improvement, functional integration, and process integration, as compared to conventional power hybrid modules. This paper presents the details of this technology, including the process design and implementation. A subsystem IPEM, incorporating power factor correction (PFC) and dc/dc switching stages for a distributed power system (DPS) front-end converter application, has been fabricated and characterized to demonstrate the feasibility of this power electronics integration technology. The capability for functional integration and the electrical performance improvement, which includes reduction in parasitics and increase in efficiency, are presented
Keywords
DC-DC power convertors; multichip modules; power electronics; 3D MCM integration technology; 3D multichip module; Al; IPEM packaging application; bare power chip; ceramic frame; circuit wiring; dc-dc switching; dielectric layer; direct metallization bond; distributed power system; embedded power; embedding chip; front-end converter; integrated chips component; integrated power electronics module; parasitic parameters; planar metallization pattern; power electronics switching; power factor correction; power module packaging; Ceramics; Circuits; Dielectric substrates; Diodes; Electronics packaging; Hybrid power systems; Insulated gate bipolar transistors; MOSFETs; Metallization; Power electronics; Direct metallization bond; embedding chip; parasitic parameters; power conversion efficiency; power module packaging; three-dimensional (3-D) integration;
fLanguage
English
Journal_Title
Advanced Packaging, IEEE Transactions on
Publisher
ieee
ISSN
1521-3323
Type
jour
DOI
10.1109/TADVP.2006.879496
Filename
1667870
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