DocumentCode :
1078592
Title :
Efficiency of short LDPC codes combined with long Reed-Solomon codes for magnetic recording channels
Author :
Morita, Toshihiko ; Ohta, Mitsuhiko ; Sugawara, Takao
Author_Institution :
Fujitsu Labs. Ltd., Atsugi, Japan
Volume :
40
Issue :
4
fYear :
2004
fDate :
7/1/2004 12:00:00 AM
Firstpage :
3078
Lastpage :
3080
Abstract :
This paper proposes the use of low-density parity check (LDPC) codes with short block lengths such as 1-K bits for magnetic recording. In general, there is a degradation in bit error rate as the block length of the LDPC codes decreases. Yet, we show that short LDPC codes do not suffer from degraded sector-error-rate performance if the sector size is 32 K bits and if long Reed-Solomon codes over GF(212) are used. This is due to the unique error distribution of iterative decoding. Shorter codes significantly reduce the amount of buffer memory in the iterative decoder and make hardware implementation more feasible.
Keywords :
Reed-Solomon codes; channel coding; error statistics; iterative decoding; magnetic recording; parity check codes; bit error rate; block length; buffer memory; error distribution; error-rate performance; hardware implementation; iterative decoding; long Reed-Solomon codes; low-density parity check codes; magnetic recording channels; reduced complexity; Bit error rate; Buffer storage; Circuits; Degradation; Error correction codes; Hardware; Iterative decoding; Magnetic recording; Parity check codes; Pipelines; Iterative decoding; Reed–Solomon codes; low-density parity check codes; reduced complexity;
fLanguage :
English
Journal_Title :
Magnetics, IEEE Transactions on
Publisher :
ieee
ISSN :
0018-9464
Type :
jour
DOI :
10.1109/TMAG.2004.829209
Filename :
1325738
Link To Document :
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