DocumentCode :
1079457
Title :
Alpha-particle-induced soft error rate in VLSI circuits
Author :
Sai-Halasz, George A. ; Wordeman, Matthew R. ; Dennard, Robert H.
Author_Institution :
IBM Thomas J. Watson Research Center, Yorktown Heights, NY
Volume :
29
Issue :
4
fYear :
1982
fDate :
4/1/1982 12:00:00 AM
Firstpage :
725
Lastpage :
731
Abstract :
We study soft error rates (SER) in VLSI circuits, where the charge capable of causing a soft error becomes only a few percent of that created by a typical α-particle impacting on the circuits. Theoretical investigations are done considering a DRAM test vehicle, with the assumption that it is exposed to α-particles emanating from materials on the chip. We examine the effects of scaling on the SER and investigate the performance of several device structural modifications that can be introduced to decrease SER. We present experimental results on the achieved reduction in the charge that surface nodes collect when structural modifications are introduced. We find, both experimentally and theoretically, that the most promising modification is the incorporation of a buried grid of opposite conductivity type from the substrate. In general, however, as stored charge shrinks, multiple errors become prevalent, and SER reduction due to fabrication changes becomes less effective.
Keywords :
Circuit testing; Conductivity; Contamination; Error analysis; Fabrication; Packaging; Radioactive materials; Random access memory; Vehicles; Very large scale integration;
fLanguage :
English
Journal_Title :
Electron Devices, IEEE Transactions on
Publisher :
ieee
ISSN :
0018-9383
Type :
jour
DOI :
10.1109/T-ED.1982.20769
Filename :
1482266
Link To Document :
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