DocumentCode :
1079522
Title :
An approach to the implementation of digital filters
Author :
Jackson, Leland B. ; Kaiser, James F. ; McDonald, Henry S.
Author_Institution :
Bell Telephone Laboratories, Murray Hill, NJ, USA
Volume :
16
Issue :
3
fYear :
1968
fDate :
9/1/1968 12:00:00 AM
Firstpage :
413
Lastpage :
421
Abstract :
An approach to the implementation of digital filters is presented that employs a small set of relatively simple digital circuits in a highly regular and modular configuration, well suited to LSI construction. Using parallel processing and serial, two´s-complement arithmetic, the required arithmetic circuits (adders and multipliers) are quite simple, as are the remaining circuits, which consist of shift registers for delay and small read-only memories for coefficient storage. The arithmetic circuits are readily multiplexed to process multiple data inputs or to effect multiple, but different, filters (or both), thus providing for efficient hardware utilization. Up to 100 filter sections can be multiplexed in audio-frequency applications using presently available digital circuits in the medium-speed range. The filters are also easily modified to realize a wide range of filter forms, transfer functions, multiplexing schemes, and round-off noise levels by changing only the contents of the read-only memory and/or the timing signals and the length of the shift-register delays. A simple analog-to-digital converter, which uses delta modulation as an intermediate encoding process is also presented for andio-frequency applications.
Keywords :
Adders; Arithmetic; Delay; Digital circuits; Digital filters; Hardware; Large scale integration; Modular construction; Parallel processing; Shift registers;
fLanguage :
English
Journal_Title :
Audio and Electroacoustics, IEEE Transactions on
Publisher :
ieee
ISSN :
0018-9278
Type :
jour
DOI :
10.1109/TAU.1968.1162002
Filename :
1162002
Link To Document :
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