DocumentCode :
1079861
Title :
Investigation of the novel attributes of a fully depleted dual-material gate SOI MOSFET
Author :
Chaudhry, Anurag ; Kumar, M. Jagadesh
Author_Institution :
Dept. of Electr. Eng., Indian Inst. of Technol., New Delhi, India
Volume :
51
Issue :
9
fYear :
2004
Firstpage :
1463
Lastpage :
1467
Abstract :
The novel features of a fully depleted (FD) dual-material gate (DMG) silicon-on-insulator (SOI) MOSFET are explored theoretically and compared with those of a compatible SOI MOSFET. The two-dimensional numerical simulation studies demonstrate the novel features as threshold voltage roll-up and simultaneous transconductance enhancement and suppression of short-channel effects offered by the FD DMG SOI MOSFET. Moreover, these unique features can be controlled by engineering the workfunction and length of the gate material. This work illustrates the benefits of high-performance FD DMG SOI MOS devices over their single material gate counterparts and provides an incentive for further experimental exploration.
Keywords :
MOSFET; carrier mobility; silicon-on-insulator; work function; FD DMG SOI MOSFET; carrier transport efficiency; dual-material gate; gate material length; gate-material engineering; short-channel effects; silicon-on-insulator; threshold voltage; transconductance enhancement; CMOS technology; Capacitance; FETs; MOS devices; MOSFET circuits; Nonuniform electric fields; Silicon on insulator technology; Thin film devices; Threshold voltage; Transconductance; Carrier transport efficiency; DMG; FD; SOI; SOI MOSFET; dual material gate; fully depleted; gate-material engineering; silicon-on-insulator;
fLanguage :
English
Journal_Title :
Electron Devices, IEEE Transactions on
Publisher :
ieee
ISSN :
0018-9383
Type :
jour
DOI :
10.1109/TED.2004.833961
Filename :
1325851
Link To Document :
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