DocumentCode :
1080236
Title :
High-speed GaAs SDFL divider circuit
Author :
Walton, Emory R., Jr. ; Shen, Eve K. ; Lee, Franks S. ; Zucca, Ricardo ; Yie-Der Shen ; Welch, Bryant M. ; Dikshit, Rahul
Author_Institution :
Rockwell International Microelectronics, Thousand Oaks, CA
Volume :
29
Issue :
7
fYear :
1982
fDate :
7/1/1982 12:00:00 AM
Firstpage :
1116
Lastpage :
1122
Abstract :
High-speed divider circuits find numerous applications in prescalers for counters, frequency synthesizers, and digital phase locked loops. To accommodate these applications, a high-speed multimode divider circuit has been designed, fabricated, and tested. This circuit, fabricated on semi-insulating Gallium Arsenide substrates, and utilizing Schottky diode FET logic (SDFL) technology, has been tested at a maximum clock frequency of 1.84 GHz. High yields of circuits operating over 1 GHz have been obtained over a number of wafers.
Keywords :
Circuit testing; Clocks; Counting circuits; FETs; Frequency synthesizers; Gallium arsenide; Logic circuits; Logic testing; Phase locked loops; Schottky diodes;
fLanguage :
English
Journal_Title :
Electron Devices, IEEE Transactions on
Publisher :
ieee
ISSN :
0018-9383
Type :
jour
DOI :
10.1109/T-ED.1982.20842
Filename :
1482339
Link To Document :
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