A new self-aligning poly-contact technology for MOS LSI

A new self-aligning contact technology suitable for high density MOS LSI is proposed. This technology includes the following steps: 1) coating the polysilicon gate and interconnection areas by the photosensitive resist and baking it into polymalization. With an appropriate viscosity, resist thickness becomes thinner only above the polysilicon areas; and 2) removing selectively the thinned parts of the resist above the polysilicon areas using photo engraved openings of newly coated resist as a mask. This technology is applicable to the conventional Si-gate MOS processes and especially useful for short-channel MOSFET devices because it does not require a high temperature treatment that greatly spreads out the implanted doses compared with the conventional self-aligning contact technology. The high potential of this technology for MOS LSI is verified by the good yield and the high performance of the CMOS PLL (phase-locked-loop) LSI.