DocumentCode
1080594
Title
A high-frequency bipolar JFET I2L process
Author
Lui, Sik K. ; Meyer, Robert G.
Author_Institution
Trilogy Corporation, Santa Clara, CA
Volume
29
Issue
8
fYear
1982
fDate
8/1/1982 12:00:00 AM
Firstpage
1319
Lastpage
1323
Abstract
A new monolithic process is described which allows simultaneous fabrication of high-speed (
MHz) JFET\´s, high-frequency (
GHz) bipolar transistors plus I2L logic (
ns). The process incorporates an ion-implanted JFET structure with independently contacted gates and a bipolar transistor with implanted base and emitter.
MHz) JFET\´s, high-frequency (
GHz) bipolar transistors plus I2L logic (
ns). The process incorporates an ion-implanted JFET structure with independently contacted gates and a bipolar transistor with implanted base and emitter.Keywords
Bipolar transistors; CMOS technology; Capacitance; Capacitors; Fabrication; Implants; JFET circuits; Laboratories; Military computing; Transconductance;
fLanguage
English
Journal_Title
Electron Devices, IEEE Transactions on
Publisher
ieee
ISSN
0018-9383
Type
jour
DOI
10.1109/T-ED.1982.20874
Filename
1482371
Link To Document