Title :
Low-voltage, low-power BiCMOS digital circuits
Author :
Rofail, Samir S.
Author_Institution :
Sch. of Electr. & Electron. Eng., Nanyang Technol. Inst., Singapore
fDate :
5/1/1994 12:00:00 AM
Abstract :
A new BiCMOS buffer circuit, for low-voltage, low-power environment, is presented. The circuit is based on the deep submicron technology and utilizes the parasitic bipolar transistors associated with the CMOS structure. The analysis, simulations and SPICE results confirm the functionality of the circuit and its speed and voltage swing superiority, compared with conventional BiCMOS circuits at low supply voltages
Keywords :
BiCMOS integrated circuits; SPICE; buffer circuits; circuit analysis computing; delays; digital integrated circuits; 2.2 to 3.3 V; BiCMOS digital circuits; CMOS structure; SPICE results; deep submicron technology; low-power environment; low-voltage operation; parasitic bipolar transistors; simulations; Analytical models; BiCMOS integrated circuits; Bipolar transistors; CMOS process; CMOS technology; Capacitance; Circuit simulation; Digital circuits; Low voltage; Senior members;
Journal_Title :
Solid-State Circuits, IEEE Journal of