DocumentCode
1081491
Title
A CMOS floating-point vector-arithmetic unit
Author
Timmermann, D. ; Rix, B. ; Hahn, H. ; Hosticka, B.J.
Author_Institution
Fraunhofer Inst. of Microelectron. Circuits and Syst., Duisburg, Germany
Volume
29
Issue
5
fYear
1994
fDate
5/1/1994 12:00:00 AM
Firstpage
634
Lastpage
639
Abstract
This work describes a floating-point arithmetic unit based on the CORDIC algorithm. The unit computes a full set of high level arithmetic and elementary functions: multiplication, division, (co)sine, hyperbolic (co)sine, square root, natural logarithm, inverse (hyperbolic) tangent, vector norm, and phase. The chip has been integrated in 1.6 μm double-metal n-well CMOS technology and achieves a normalized peak performance of 220 MFLOPS
Keywords
CMOS integrated circuits; digital arithmetic; integrated logic circuits; parallel architectures; pipeline processing; vector processor systems; 1.6 micron; 220 MFLOPS; CORDIC algorithm; cosine; division; double-metal n-well CMOS technology; floating-point vector-arithmetic unit; hyperbolic sine; inverse tangent; multiplication; natural logarithm; phase; sine; square root; vector norm; CMOS technology; Circuits and systems; Convergence; Floating-point arithmetic; Iterative algorithms; Microelectronics; Microprogramming; Pipelines; Throughput; Zinc;
fLanguage
English
Journal_Title
Solid-State Circuits, IEEE Journal of
Publisher
ieee
ISSN
0018-9200
Type
jour
DOI
10.1109/4.284719
Filename
284719
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