A 1.2-V Highly Linear Balanced Noise-Cancelling LNA in 0.13-μm CMOS

Author

Jussila, Jarkko ; Sivonen, Pete

Author_Institution

STMicroelectron., Helsinki

Volume

43

Issue

3

fYear

2008

fDate

3/1/2008 12:00:00 AM

Firstpage

579

Lastpage

587

Abstract

In this paper, a current-to-voltage combiner is proposed to realize a highly linear, balanced noise-cancelling low-noise amplifier (LNA) capable of low-voltage operation. The current-to-voltage combiner, implemented in the load of the amplifier, converts the output currents of the parallel common-gate (CG) and common-source (CS) stages of the LNA to voltages, equalizes the amplitudes of the voltages, and combines the voltages to a single output voltage. Since only a CS stage and passive components are employed to cancel the noise and distortion due to the CG input impedance matching circuit, high linearity is achieved in spite of the low supply voltage of 1.2 V. The LNA achieves a noise figure (NF) of 3.0 dB at 2.1 GHz with an input-referred third-order intercept point (IIP3) of +10.5 dBm while consuming 10.5 mA from a 1.2-V supply. The amplifier is fabricated in 0.13-mum CMOS process.

Keywords

CMOS analogue integrated circuits; UHF amplifiers; UHF integrated circuits; impedance matching; integrated circuit noise; low noise amplifiers; low-power electronics; power combiners; CMOS analog integrated circuits; CMOS process; common-source stages; current 10.5 mA; current-to-voltage combiner; frequency 2.1 GHz; highly linear balanced noise-cancelling LNA; impedance matching circuit; input-referred third-order intercept point; low-noise amplifier; low-voltage operation; noise figure; parallel common-gate stage; passive components; radio frequency integrated circuits; size 0.13 mum; voltage 1.2 V; CMOS process; Character generation; Circuit noise; Impedance matching; Linearity; Low voltage; Low-noise amplifiers; Noise cancellation; Noise figure; Noise measurement; CMOS analog integrated circuits; low-noise amplifiers (LNA); noise cancelling; radio frequency integrated circuits;

fLanguage

English

Journal_Title

Solid-State Circuits, IEEE Journal of

Publisher

ieee

ISSN

0018-9200

Type

jour

DOI

10.1109/JSSC.2007.916582

Filename

4456778