A 20-Gb/s Burst-Mode Clock and Data Recovery Circuit Using Injection-Locking Technique

Author

Lee, Jri ; Liu, Mingchung

Author_Institution

Nat. Taiwan Univ., Taipei

Volume

43

Issue

3

fYear

2008

fDate

3/1/2008 12:00:00 AM

Firstpage

619

Lastpage

630

Abstract

A 20-Gb/s clock and data recovery circuit incorporates injection-locking technique to achieve high-speed operation with low power dissipation. The circuit creates spectral line at the frequency of data rate and injection-locks two cascaded LC oscillators. A frequency-monitoring mechanism is employed to ensure a close matching between the VCO natural frequency and data rate. Fabricated in 90-nm CMOS technology, this circuit achieves a bit error rate of less than 10^-9 in both continuous (PRBS of 2³¹-1) and burst modes while consuming 175 mW from a 1.5-V supply.

Keywords

CMOS digital integrated circuits; cascade networks; clocks; error statistics; injection locked oscillators; integrated circuit design; optical burst switching; optical fibre networks; phase locked loops; voltage-controlled oscillators; CMOS technology; VCO natural frequency; bit error rate; bit rate 20 Gbit/s; burst mode operation; burst-mode clock; cascaded LC oscillators; data recovery circuit; frequency-monitoring mechanism; high-speed operation; injection-locking technique; low power dissipation; operational amplifier; phase-locked loop; power 175 mW; size 90 nm; spectral lines; voltage 1.5 V; voltage-controlled oscillator; Bit error rate; CMOS technology; Circuits; Clocks; Correlators; Frequency; Injection-locked oscillators; Phase locked loops; SONET; Voltage-controlled oscillators; Burst mode; clock and data recovery (CDR); injection-locked; operational amplifier; phase-locked loop (PLL); voltage-controlled oscillator (VCO);

fLanguage

English

Journal_Title

Solid-State Circuits, IEEE Journal of

Publisher

ieee

ISSN

0018-9200

Type

jour

DOI

10.1109/JSSC.2007.916598

Filename

4456780