Title :
Algorithmic Concurrent Error Detection in Complex Digital-Processing Systems
Author :
Costas-Perez, L. ; Rodriguez-Andina, Juan Jose
Author_Institution :
Univ. of Vigo, Vigo
Abstract :
Fault tolerance capabilities are becoming a fundamental requirement in many designs. Improving these systems´ dependability under demanding environmental and operating conditions requires new techniques that use concurrent error detection (CED) strategies to guarantee data integrity. The system-level algorithmic CED methodology uses selective redundancy for online monitoring of system-level properties, without requiring any modifications to the target system.
Keywords :
error detection; fault tolerance; logic design; redundancy; algorithmic concurrent error detection; complex digital-processing system; fault tolerance; online monitoring; system-level properties; Circuit noise; Costs; Encoding; Energy consumption; Fault tolerance; Hardware; Noise generators; Noise reduction; Redundancy; Voltage fluctuations; CED; concurrent error detection; dependability; digital-signal processing; system-level error detection; wavelet transform;
Journal_Title :
Design & Test of Computers, IEEE
