• DocumentCode
    1082246
  • Title

    Adder and Multiplier Design in Quantum-Dot Cellular Automata

  • Author

    Cho, Heumpil ; Swartzlander, Earl E., Jr.

  • Author_Institution
    Qualcomm Inc., San Diego, CA
  • Volume
    58
  • Issue
    6
  • fYear
    2009
  • fDate
    6/1/2009 12:00:00 AM
  • Firstpage
    721
  • Lastpage
    727
  • Abstract
    Quantum-dot cellular automata (QCA) is an emerging nanotechnology, with the potential for faster speed, smaller size, and lower power consumption than transistor-based technology. Quantum-dot cellular automata has a simple cell as the basic element. The cell is used as a building block to construct gates and wires. Previously, adder designs based on conventional designs were examined for implementation with QCA technology. That work demonstrated that the design trade-offs are very different in QCA. This paper utilizes the unique QCA characteristics to design a carry flow adder that is fast and efficient. Simulations indicate very attractive performance (i.e., complexity, area, and delay). This paper also explores the design of serial parallel multipliers. A serial parallel multiplier is designed and simulated with several different operand sizes.
  • Keywords
    adders; cellular automata; multiplying circuits; nanotechnology; network synthesis; semiconductor quantum dots; adder design; carry flow adder; multiplier design; nanotechnology; operand sizes; quantum-dot cellular automata; serial parallel multipliers; Added delay; Adders; Circuit simulation; Electrons; Energy consumption; Nanotechnology; Power system modeling; Quantum cellular automata; Quantum dots; Temperature; Wires; Adder; carry delay multiplier; carry flow adder; multiplier; quantum-dot cellular automata (QCA).;
  • fLanguage
    English
  • Journal_Title
    Computers, IEEE Transactions on
  • Publisher
    ieee
  • ISSN
    0018-9340
  • Type

    jour

  • DOI
    10.1109/TC.2009.21
  • Filename
    4760137