DocumentCode :
1083578
Title :
A GaAs monolithic frequency divider using source coupled FET Logic
Author :
Katsu, S. ; Nambu, S. ; Shimano, S. ; Kano, G.
Author_Institution :
Matsushita Electronics Corporation, Osaka, Japan
Volume :
3
Issue :
8
fYear :
1982
fDate :
8/1/1982 12:00:00 AM
Firstpage :
197
Lastpage :
199
Abstract :
A GaAs monolithic binary frequency divider based on the new source coupled FET logic (SCFL) is reported. A very wide range for the threshold voltage in the constituent FET´s is allowable because in principle the SCFL operates in a current mode. A single-clocked SCFL master-slave frequency divider was successfully fabricated with 1µm-gate MESFET´s with a threshold voltage ranging from -0.7 V to +0.2 V. The highest operating frequency was 2.5 GHz at the power consumption of 25 mW.
Keywords :
Circuits; Differential amplifiers; Energy consumption; FETs; Frequency conversion; Gallium arsenide; Inverters; Logic; MESFETs; Threshold voltage;
fLanguage :
English
Journal_Title :
Electron Device Letters, IEEE
Publisher :
ieee
ISSN :
0741-3106
Type :
jour
DOI :
10.1109/EDL.1982.25549
Filename :
1482654
Link To Document :
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