DocumentCode
1083696
Title
GaAs Schmitt trigger memory cell design
Author
Law, Oscar M K ; Salama, C. T André
Author_Institution
Dept. of Electr. & Comput. Eng., Toronto Univ., Ont., Canada
Volume
31
Issue
8
fYear
1996
fDate
8/1/1996 12:00:00 AM
Firstpage
1190
Lastpage
1192
Abstract
A novel GaAs five-transistor static memory cell derived from a Schmitt trigger is proposed. The memory cell overcomes MESFET subthreshold leakage loss by using a self ground-shifting technique which limits the leakage current flow to the cell. Compared with conventional GaAs SRAM cells, it offers small area and as well as fast read/write cycles. A 1 Kb prototype implemented in 1 μm nonself-aligned GaAs MESFET technology exhibited read and write access times of the order of 2.0 ns
Keywords
III-V semiconductors; MESFET integrated circuits; SRAM chips; field effect memory circuits; gallium arsenide; integrated circuit design; leakage currents; trigger circuits; 1 Kbit; 1 micron; 2.0 ns; GaAs; MESFET subthreshold leakage loss; SRAM cells; Schmitt trigger; access times; nonself-aligned MESFET technology; read/write cycles; self ground-shifting technique; static memory cell; Gallium arsenide; Leakage current; Logic arrays; MESFETs; MOSFETs; Silicon; Subthreshold current; Switches; Threshold voltage; Trigger circuits;
fLanguage
English
Journal_Title
Solid-State Circuits, IEEE Journal of
Publisher
ieee
ISSN
0018-9200
Type
jour
DOI
10.1109/4.508268
Filename
508268
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