Approach for a Standardized Methodology for Multisite Processing of 300-mm Wafers at R&D Sites

Author

Oechsner, Richard ; Pfeffer, M. ; Frickinger, J. ; Schellenberger, M. ; Roeder, G. ; Pfitzner, L. ; Ryssel, H. ; Fritzsche, M. ; Kaushik, V. ; Renaud, D. ; Danel, A. ; Claeys, C. ; Bearda, T. ; Lering, M. ; Graef, M. ; Murphy, B. ; Walther, H. ; Hury, S.

Author_Institution

Fraunhofer Inst. of Integrated Syst. and Device Technol., Erlangen

Volume

20

Issue

3

fYear

2007

Firstpage

215

Lastpage

221

Abstract

This paper describes the objectives and results of a joint European project named FLYING WAFER. The goal of the project was to provide a methodology for interlinking European R&D centers in micro and nano technologies to a distributed 300-mm CMOS R&D line. The project was carried out as a feasibility study. Therefore, the results provide a model and concept which has the potential of guaranteeing a safe and fast exchange of wafers and data between European R&D nodes to allow multisite processing. An implementation phase is planned as a second step.

Keywords

CMOS integrated circuits; nanoelectronics; research and development; wafer bonding; CMOS; FLYING WAFER project; micro technologies; multisite processing; nano technologies; standardized methodology; wafers; CMOS technology; Costs; Manufacturing industries; Manufacturing processes; Microelectronics; Nanotechnology; Research and development; Semiconductor device manufacture; Semiconductor device modeling; Technological innovation; 300 mm; Multisite processing; nanotechnology; semiconductor manufacturing;

fLanguage

English

Journal_Title

Semiconductor Manufacturing, IEEE Transactions on

Publisher

ieee

ISSN

0894-6507

Type

jour

DOI

10.1109/TSM.2007.901828

Filename

4285834