High-efficiency linear RF Amplifier - a unified circuit approach to achieving compactness and low distortion

The realization of a highly efficient linearized amplifier has emerged as a paramount issue in the design of advanced mobile handsets. In this paper, a new RF amplifier linearization scheme using a compensating transistor combination is proposed. The devised approach ably utilizes all terminals of an additional transistor that offers a unified pre-post-distortion and cubic distortion characteristic for performance improvement. Meticulous modeling along with a power-dependent Volterra series is performed to identify contributions on each mechanism under various power levels. An experimental four-tone test reveals a maximum 28-dB reduction for the intermodulation distortion at 1.95 GHz, which outperforms typical pre-distortions of 5-10 dB. A single-ended two-stage amplifier module demonstrates a state-of-the-art power efficiency of 55% with 27-dB transducer gain at 24-dBm output power. Meanwhile, the adjacent channel power ratio (ACPR ₁) is maintained with good margins of -35dBc for a four-channel wideband code-division multiple-access signal under all output dynamics. Graceful degradations on modulation bandwidths, tone spacing, bias, and gain variations are also discussed, showing superb performance with virtually no dedicated retuning circuit parameters for multicarrier applications. By combining a bias control along with the proposed linearization technique, the average efficiency (12%) is 3times higher than that of the fixed bias (3.94%), demonstrating the potential utility on further prolonging battery lifetime in practical scenarios