DocumentCode :
108406
Title :
Material and Structure Designs for Reliable Quad-Flat-Package for Scaled-Down Ultralarge-Scale Integrations With Porous Low- k/{\\rm Cu} Interconnects
Author :
Tagami, M. ; Ito, Fumihiko ; Inoue, Naoko ; Hayashi, Yasuhiro
Author_Institution :
LSI Res. Lab., Renesas Electron. Corp., Sagamihara, Japan
Volume :
3
Issue :
3
fYear :
2013
fDate :
Mar-13
Firstpage :
384
Lastpage :
390
Abstract :
Reliability of a quad-flat-package (QFP) with a circuit-under-pad (CUP) structure is investigated for Cu interconnects with porous low dielectric constant (low-k) films in scaled-down ultralarge-scale integrations. The following experimental factors are discussed: 1) low-k material properties and their stacking structures; 2) CUP structure; and 3) mold compound material properties. The QFP characteristics are analyzed after chip dicing and Ag wire bonding, as well as after molding. Higher adhesion strength of porous low-k film to SiCN cap dielectrics and rigid Cu-anchored CUP structure can achieve highly reliable QFP packaging. A lower coefficient of thermal expansion (CTE) of the molding compound is also found to be effective in eliminating low-k delamination during thermal cycle test because it can reduce the stress at the cracking position. The adhesion-promoting porous SiOCH film with the Cu-anchored CUP in a low-CTE mold is a promising system to realize a reliable QFP with no low-k delamination, passing electrical tests after the pressure-cooker test and high-temperature storage test.
Keywords :
ULSI; adhesion; copper; cracks; high-temperature electronics; integrated circuit interconnections; lead bonding; low-k dielectric thin films; permittivity; porous materials; semiconductor device packaging; silicon compounds; silver; thermal expansion; Ag; Cu; Cu-anchored CUP structure; QFP characteristics; QFP packaging; SiCN; SiOCH; adhesion strength; chip dicing; circuit-under-pad structure; cracking position; electrical tests; high-temperature storage test; low-CTE mold; low-k material property; material design; mold compound material properties; porous low dielectric constant films; porous low-k interconnection; pressure-cooker; quad-flat-package reliability; scaled-down ultralarge-scale integration; stacking structure; structure design; thermal cycle test; thermal expansion coefficient; wire bonding; Adhesives; Compounds; Electronics packaging; Reliability; Stress; Wires; Copper; interconnect; porous low-$k$ dielectrics; quad-flat-package; reliability; ultralarge-scale integration;
fLanguage :
English
Journal_Title :
Components, Packaging and Manufacturing Technology, IEEE Transactions on
Publisher :
ieee
ISSN :
2156-3950
Type :
jour
DOI :
10.1109/TCPMT.2012.2220770
Filename :
6397591
Link To Document :
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