DocumentCode :
108449
Title :
A Universal Core Model for Multiple-Gate Field-Effect Transistors. Part I: Charge Model
Author :
Duarte, Juan Pablo ; Sung-Jin Choi ; Dong-Il Moon ; Jae-Hyuk Ahn ; Jee-Yeon Kim ; Sungho Kim ; Yang-Kyu Choi
Author_Institution :
Dept. of Electr. Eng., Korea Adv. Inst. of Sci. & Technol., Daejeon, South Korea
Volume :
60
Issue :
2
fYear :
2013
fDate :
Feb. 2013
Firstpage :
840
Lastpage :
847
Abstract :
A universal core model for multiple-gate field-effect transistors (Mug-FETs) is proposed. The proposed charge and drain current models are presented in Parts I and II, respectively. It is first demonstrated that an exact potential profile in the entire channel is not necessary for the derivation of accurate charge models in inversion-mode FETs. With application of this new concept, a universal charge model is derived for Mug-FETs by assuming an arbitrary channel potential profile, which simplifies the mathematical formulation. Thereafter, using the Pao-Sah integral, a drain current model is obtained from the charge model of Part I. The proposed model can be expressed as an explicit and continuous form for all operation regimes; therefore, it is well suited for compact modeling to support fast circuit simulations. The model shows good agreement with 2-D and 3-D numerical simulations for several multiple-gate structures, such as single-gate, double-gate, triple-gate, rectangular gate-all-around, and cylindrical gate-all-around FETs.
Keywords :
field effect transistors; numerical analysis; semiconductor device models; 2D numerical simulation; 3D numerical simulation; Mug-FET; Pao-Sah integral; arbitrary channel potential profile; compact modeling; cylindrical gate-all-around FET; double-gate FET; drain current model; fast circuit simulations; inversion-mode FET; mathematical formulation; multiple-gate field effect transistors; multiple-gate structures; rectangular gate-all-around FET; single-gate FET; triple-gate FET; universal charge model; universal core model; Computational modeling; Electric potential; FETs; Logic gates; Mathematical model; Mobile communication; Numerical models; Compact modeling; FinFET; Poisson´s equation; cylindrical gate-all-around FET (Cy-GAA-FET); double-gate FET (DG-FET); multiple-gate FET (Mug-FET); rectangular gate-all-around FET (Re-GAA-FET); semiconductor device modeling; single-gate FET (SG-FET); triple-gate FET (TG-FET);
fLanguage :
English
Journal_Title :
Electron Devices, IEEE Transactions on
Publisher :
ieee
ISSN :
0018-9383
Type :
jour
DOI :
10.1109/TED.2012.2233478
Filename :
6397597
Link To Document :
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