Title :
Numerical comparison of DMOS, VMOS, and UMOS power transistors
Author :
Tamer, Antoine A. ; Rauch, Ken ; Moll, John L.
Author_Institution :
Hewlett-Packard Laboratories, Palo Alto, CA
fDate :
1/1/1983 12:00:00 AM
Abstract :
Two-dimensional simulation of breakdown voltage and on-resistance of DMOS, VMOS, and UMOS vertical power devices is performed. The three devices are evaluated for breakdown-voltage designs of 100, 550, and 1000 V.
Keywords :
Breakdown voltage; Charge carrier processes; Conductivity; FETs; MOSFET circuits; Neodymium; Performance evaluation; Power MOSFET; Power transistors; Surface resistance;
Journal_Title :
Electron Devices, IEEE Transactions on
DOI :
10.1109/T-ED.1983.21075
