Title :
A Quad-Sampling Wide-Dynamic-Range Pulse-Frequency Modulation Pixel
Author :
Tsung-Hsun Tsai ; Hornsey, Richard
Author_Institution :
Dept. of Comput. Sci. & Eng., York Univ., Toronto, ON, Canada
Abstract :
We present a wide dynamic range (WDR) CMOS image sensor structure using the pulse-frequency modulation (PFM) pixel. The proposed pixel achieves a dynamic range (DR) of 124 dB with 8-bit resolution and operates in 60 frames/s. A quad-sampling technique is implemented that successfully reduces the pixel size by only using a 6-bit counter within the pixel. The sampling method incorporates cooperation between the pixel and column circuits to generate an automatically compressed signal that can be directly displayed without post-processing. This design has been verified through the field-programmable gate array (FPGA) implementation with a sample pixel. According to the experimental results, the sensor signal-to-noise ratio (SNR) is mainly limited by the quantization noise of the light-to-frequency conversion. The maximum SNR is 48 dB, and the common SNR dip is successfully avoided. In addition, the achievable array size is determined by all sampling periods and can be of megapixels with appropriate designs.
Keywords :
CMOS image sensors; field programmable gate arrays; FPGA implementation; PFM pixel; SNR dip; WDR CMOS image sensor structure; column circuits; compressed signal; field programmable gate array; light-to-frequency conversion; pixel size reduction; quad-sampling wide-dynamic range pulse-frequency modulation pixel; quantization noise; sensor SNR; sensor signal-to-noise ratio; Arrays; Image sensors; Logic gates; Quantization; Radiation detectors; Signal to noise ratio; CMOS image sensor; dynamic range (DR); pulse-frequency-modulation (PFM) pixel; quad sampling; signal-to-noise ratio (SNR);
Journal_Title :
Electron Devices, IEEE Transactions on
DOI :
10.1109/TED.2012.2231961