DocumentCode
1084793
Title
CMOS-process-independent average power dissipation macromodelling
Author
Mather, P.J. ; Hallam, P. ; Brouwer, M.
Author_Institution
Sch. of Eng., Huddersfield Unvi., UK
Volume
31
Issue
16
fYear
1995
fDate
8/3/1995 12:00:00 AM
Firstpage
1337
Lastpage
1338
Abstract
An accurate CMOS-process-independent average power dissipation macromodel is presented for the inverter and multiple input macros, including NAND, NOR, the transmission gate, pass gate and SRAM cell. A new macro activity time period is defined and accurate macro activity estimations are achieved without the need for analogue propagation delay simulation
Keywords
CMOS digital integrated circuits; integrated circuit modelling; CMOS-process-independent modelling; NAND gate; NOR gate; SRAM cell; average power dissipation; input macros; inverter; macro activity time period; macromodelling; pass gate; transmission gate;
fLanguage
English
Journal_Title
Electronics Letters
Publisher
iet
ISSN
0013-5194
Type
jour
DOI
10.1049/el:19950914
Filename
408309
Link To Document