DocumentCode :
1084860
Title :
An analog processor architecture for a neural network classifier
Author :
Verleysen, Michel ; Thissen, Philippe ; Voz, Jean-Luc ; Madrenas, Jodi
Author_Institution :
Katholieke Univ., Leuven, Belgium
Volume :
14
Issue :
3
fYear :
1994
fDate :
6/1/1994 12:00:00 AM
Firstpage :
16
Lastpage :
28
Abstract :
Many neural-like algorithms currently under study support classification tasks. Several of these algorithms base their functionality on LVQ-like procedures to find locations of centroids in the data space, and on kernel (or radial-basis) functions centered on these centroids to approximate functions or probability densities. A generic analog chip could implement in a parallel way all basic functions found in these algorithms, permitting construction of a fast, portable classification system.<>
Keywords :
analogue computer circuits; analogue processing circuits; learning (artificial intelligence); neural chips; neural nets; parallel architectures; pattern recognition; LVQ-like procedures; analog processor architecture; classification; functions densities; generic analog chip; neural network classifier; neural-like algorithms; portable classification system; probability densities; Analog computers; Classification algorithms; Image recognition; Neural networks; Optical signal processing; Partitioning algorithms; Portable computers; Shape; Signal processing algorithms; Vector quantization;
fLanguage :
English
Journal_Title :
Micro, IEEE
Publisher :
ieee
ISSN :
0272-1732
Type :
jour
DOI :
10.1109/40.285221
Filename :
285221
Link To Document :
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